1. Field of the Invention
This present invention relates generally to a power conversion circuit and more particularly to a multiphase switching regulator.
2. Description of the Related Art
A power conversion circuit (e.g., switching regulator) accepts a Direct Current (DC) voltage source at one level and outputs a desired DC voltage at another level. The switching regulator includes one or more switches which can be implemented by Metal-Oxide-Semiconductor-Field-Effect-Transistors (MOSFETs). The switches alternate between connecting and disconnecting the voltage source to circuits that drive the output. The duty cycle of the switching determines the output voltage. The switching is typically controlled by a Pulse-Width Modulation (PWM) circuit.
Switching regulators are useful in high current applications, such as high power microprocessors, Pentium II and Pentium III based applications, notebook computers, desktop computers, network servers, large memory arrays, workstations and DC high-power distribution systems, which typically require 15 to 200 amperes. The switching regulator can have multiple parallel channels to process one or more of the voltage sources to drive a common output. Each channel is substantially identical and includes an inductor. The input terminal of the inductor is switched between the voltage source and ground.
In a multiphase switching regulator, an exemplary PWM circuit provides a variable duty cycle signal to control the switching for each channel. The PWM signals are synchronous with different phases for each channel, thereby allowing each channel to be switched on at a different time. The multiple phases increase the output ripple frequency above the fundamental channel switching frequency and reduce the input ripple current, thereby significantly reducing input and output capacitors which are large and expensive. Stress and heat on the components are also reduced because the output current is spread among the multiple channels.
The DC current through each inductor is proportional to the duty cycle of its PWM signal and the value of its voltage source. Each inductor has a current limit. Typically, more PWM circuits are used when more output current is desired. The output terminals of all the inductors are electrically connected to provide a single output of the power conversion circuit.
The output terminals of all the inductors are tied together and therefore have identical voltages. The input terminal of each inductor has a rectangular wave voltage signal, which is derived from the voltage source and ground. The duty cycles of the rectangular wave voltage signals of respective channels are affected by variations in the respective PWM circuits and switches (e.g., design tolerances, offsets, and timing variations). A slight difference in the duty cycle can produce a significant difference in the DC current through the inductor in each channel.
High efficiency power conversion circuits typically use inductors with low core loss (e.g., ferrite inductors). When the peak design current is exceeded (i.e., saturation), the inductance of ferrite core material collapses abruptly which results in an abrupt increase in inductor ripple current and output voltage ripple. Thus, it is important to keep the inductor core from saturating.
Forced current sharing is a concept that all channels contribute substantially identical currents to the output. Forced current sharing prevents an inductor in one of the channels from saturating. Prior art systems sense the current in each channel and adjust the respective duty cycles to produce the same current for each channel. Current sensing decreases the efficiency of the power conversion circuit because power is dissipated by a sensing resistor. Further, current sensing requires an undesirable ripple voltage across the sensing resistor in order to work properly. Alternatively, other prior art systems employed costly precision design and trimming in an attempt to achieve accurate current sharing without sensing resistors. Typically, phase current mismatches are on the order of 30 percent or greater when employing precision duty cycle matched converters, necessitating the use of significantly higher current MOSFETs and inductors.